Derivation of single-ended CMOS inverter ring oscillator close-in phase noise from basic circuit and device properties

A closed-form expression of close-in phase noise is derived for single-ended CMOS inverter ring oscillators. Close-in phase noise is expressed depending on the MOSFET channel length L/sub eff/, the oscillator stage number n, the NMOS and PMOS flicker noise coefficients KF/sub N/ and KF/sub P/ and the peak currents I/spl circ//sub DN/ and I/spl circ//sub DP/ that discharge and charge the node capacitances. Design implications regarding stage number n and gate length L are derived and verified by measurements. Further, the dependency of close-in phase noise on inverter symmetry is investigated. An optimum ratio of PMOS to NMOS channel width is derived and shown to be dependent on KF/sub N/ and KF/sub P/. The derived optimum ratio substantially deviates from the value for waveform symmetry. This characteristic is also confirmed by measurements.