A CMOS 5.5/2.4 GHz dual-band smart-antenna transceiver with a novel RF dual-band phase shifter for WLAN 802.11a/b/g

The paper presents the design of an integrated CMOS 5.5/2.4 GHz dual-band smart-antenna transceiver for WLAN 802.11a/b/g applications. The phase shifter in the transceiver provides a variable 0/spl deg/ to 360/spl deg/ RF phase shift to each signal path at both bands using a novel integrated phase shifting approach. The transceiver is a typical super-heterodyne architecture. The chip is designed to operate with any off-the-shelf digital baseband chip. It is fabricated in a 0.18 /spl mu/m 60 GHz CMOS technology. The chip size is 2000 /spl mu/m /spl times/ 3000 /spl mu/m. The overall power consumption, excluding off-chip power amplifier and IF/baseband chip, is 100 mW in receive mode and 90 mW in transmit mode, with an acceptable supply voltage range of 1.8 to 3.3 V.