Efficient parallel logic simulation techniques for the Connection Machine

Three efficient parallel logic simulation techniques for the Connection Machine are developed. The first technique which uses a global clock, is a synchronous version of a traditional simulation technique. The second technique is a hybrid of both the synchronous simulation technique with a global clock and the Chandy-Misra algorithm for asynchronous event processing. The third technique, called a simulation time lookahead technique, is proposed to make the second technique more optimistic than the Chandy-Misra algorithm by predicting in advance the timestamp of the next event. Experimental results show that the three techniques achieve better performance than the Time Warp protocol on the Connection Machine. The proposed techniques are several hundred times faster than the VHDL simulator on a SUN3, especially for circuits with very large number of gates.<
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