Automated generation of configurable media processors

Low-power media processors are important components in wireless multimedia cell phones, multimedia personal digital assistants, and other handheld multimedia devices. The ideal media processor implementation for these systems varies greatly based on cost, performance, and power requirements. This paper presents a design methodology for automatically generating synthesizable hardware description language (HDL) models for multimedia processors. The multimedia processors support the PLX instruction set architecture, and are configured based on a high-level machine definition file, which specifies the size of the processor datapath, the types of functional units, and the configuration for on-chip memory.