Optimization of thin-film resistive-gate and capacitive-gate GaAs charge-coupled devices

Computer simulation of high-speed gallium arsenide charge coupled devices (CCDs) was performed using a two-dimensional semiconductor device simulation program. The measured performance of fabricated GaAs CCDs is compared with modeled results. The effect of active layer thickness and doping concentration on the charge transfer efficiency (CTE) and the dynamic range is investigated using different layers. Various gate architectures are compared for optimum dynamic range and compatibility with GaAs MESFET technology. The effect of clock shape on CTE is studied. Sensitivity analysis is performed on output structures. Both capacitive-gate CCD (CGCCD) and resistive-gate CCD (RGCCD) techniques are considered.<
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