Leakage control for large fan-in Domino gates using substrate biasing

Small area, Low power and high speed circuits are essential components propelling today's microprocessors. Domino logic gates are basic components in this family. One disadvantage pertaining to domino gates is the trade-off between speed and noise immunity, which is highly affected by leakage currents. In this paper, we propose the usage of reverse bulk node voltage in order to resolve this trade-off, while reducing the active leakage power consumed. A 50% reduction in active leakage power, and 40% saving in gate delay were achieved.