A novel experimental method to measure interface trap density in gate-drain overlap region

In this paper, a novel trap induced drain leakage (TIDL) current measurement method to quantificationally measure the interface trap density in the gate-drain overlap region was proposed. By measuring the trap induced leakage (TIDL) current and using the formulas developed in this work, the generated interface trap density in the gate-drain overlap region during the hot carrier stress can be calculated instantly. It is found that the stress-time dependence of interface trap generation follow a power law.