CMOS pixel for subretinal implantable prothesis

Visual capabilities recovery for some kind of illness is possible through subretinal implantable device stimulation. Two possible architectures for retinal pixel are proposed, fabricated in 0.35 /spl mu/m CMOS and compared, including evaluation of electronic response on a human-tissue-like interface. In these solutions, power consumption has been proved to be dominated by electrode stimulation and, in normal light condition, typical consumption is below 1 mW/pixel. The proposed pixel architectures, with 120 /spl mu/m (LICOS) and 100 /spl mu/m (WATCH) inter-pixel step, provide the smallest, standalone, subretinal implantable chips ever reported.