The noise and suppression transfer functions of the Anti-Jitter circuit

The Anti-Jitter circuit suppresses the phase and time jitter on a frequency source by feed-forward cancellation automatically balanced over a wide range of source frequencies. The balance is maintained by a 'DC-removal' feedback control loop that results in a lowest base-band (or sideband) jitter suppression frequency for the AJC and a consequential limitation on the final settling speed for the phase error. In this paper an 'analytic AJC system simulator', written in Mathcad is used to find some 'optimum' sets of AJC control loop parameters. The AJC transfer functions for 'jitter suppression' and for the filtering of the two main noise sources, 'integrator noise' and 'comparator noise', are derived from the AJC system block diagram. Then for typical values of the two noise sources the total predicted output noise spectrum and the suppression ratio are plotted in a format suitable for comparison with measured noise and suppression results from a spectrum analyser. By integration of the predicted noise spectra the Mathcad simulator also can produce estimates for the total jitter limit of the AJC internally generated noise. These confirm that the AJC close-to-carrier noise (inside the loop bandwidth) is much less than for a typical PLL of the same bandwidth (because there is no division in the AJC). For an AJC (discharge) current of 1 mA the further out sideband noise corresponds to a VCO with a Q of about 5 to 10; with an increase of equivalent Q to 50 to 100 if the discharge current is raised to 10 mA.