Low-voltage scaled CMOS and BiCMOS digital circuits

A mixed two-dimensional numerical device/circuit simulation analysis of scaled BiCMOS and CMOS circuits is presented. Submicrometer processes with 0.4- mu m design rules operating at a power supply down to 2.8 V are examined. It is shown that when subjected to scaling, conventional BiCMOS maintains its superior performance compared to that of CMOS even at scaled power supplies.<
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