Asymmetric energy distribution of interface traps in n- and p-MOSFETs with HfO/sub 2/ gate dielectricon ultrathin SiON buffer layer

The variable rise and fall time charge-pumping technique has been used to determine the energy distribution of interface trap density (D/sub it/) in MOSFETs with a HfO/sub 2/ gate dielectric grown on an ultrathin (<1 nm)-SiON buffer layer on Si. Our results have revealed that the (D/sub it/) is higher in the upper half of the bandgap than in the lower half of the bandgap, and are consistent with qualitative results obtained by the subthreshold current-voltage (I--V) measurements, capacitance-voltage (C-V), and ac conductance techniques. These results are also consistent with the observation that n-channel mobilities are more severely degraded than p-channel mobilities when compared to conventional MOSFETs with SiO/sub 2/ or SiON as the gate dielectric.