Islands of synchronicity, a design methodology for SoC design

To meet the challenges of faster time to market and growing design complexity, a methodology and supporting infrastructure for advanced system-on-chip design have been developed and applied to 0.13 micron technology designs. The islands of synchronicity methodology uses locally synchronous islands to produce a timing-closure friendly design style that is widely applicable across different architectures. This approach enables a modular, hierarchical physical design strategy which significantly eases top-level timing closure problems. The resultant design flow is supported by the skeleton of Reuse, a collection of IP generators and tools that automate many of the steps in SoC implementation.