A low power datapath for algebraic codebook search targeting a generic GSM system-on-chip platform

A novel hardware architecture is presented for the algebraic codebook search function used in GSM adaptive multi-rate speech encoding. This architecture was for a system-on-chip GSM baseband processing platform and is an accelerator for use with a programmable DSP intellectual property core. Features of the algorithm are exploited to achieve an efficient hardware-software partitioning. The over all effect is a 5x reduction in power consumption and a 28% reduction in MIPS.