A low voltage, 10-2550MHz, 0.15/spl mu/ CMOS, process and divider modulus independent PLL using zero-VT MOSFETs

This paper presents a current-mode, feed-forward loop filter PLL architecture that uses a bandgap referencing technique to achieve a process independent damping factor. It requires no external loop filter settings and provides divider modulus independent loop time constants through the usage of linear-N dependent charge-pump currents. A low voltage operation is achieved with extensive usage of zero-VT MOSFETs throughout the signal path, while maintaining a tight process control of the time constants with RC defined products. The frequency synthesizer specifications include: 10-2550 MHz frequency range, 1.5V digital/1V analog supply voltage, sub 1% T/sub osc/ rms jitter, 35 mW power dissipation and 800 /spl times/ 200 /spl mu/m/sup 2/ die area.