A 12b 320 MSample/s current-steering CMOS D/A converter in 0.44mm/sup 2/

This paper presents a 12-bit 320MSample/s current-steering D/A converter in 0.18/spl mu/m CMOS. In order to achieve high linearity and SFDR a large degree of segmentation has been used. A 'design for layout' approach has allowed this to be done in an area of just 0.44mm/sup 2/ . The increased switching noise associated with a high degree of segmentation has been reduced by new latch architecture. DNL of /spl plusmn/0.4 LSB and INL of /spl plusmn/ 0.5 LSB have been measured. SFDR of 95 dB has been achieved. The validity of the techniques used has been proven by fabricating the converter in 2 separate 0.18/spl mu/m processes with similar results measured for both.