Design and analysis of a programmable single-chip architecture for DVB-T base-band receiver

This work treats the design and analysis of a programmable (or reconfigurable) DSP-domain-specific architecture called MorphoSys, upon which the world's first single-chip software solution for a DVB-T base-band receiver can be implemented. Based on the first version of MorphoSys, many modifications have been made to improve greatly both computation power and data movement efficiency. Sequential codes and SIMD codes can be parallelized; temporal granularity adjustment boosts performance up to 4 times: numerous different types of data movement can be accelerated 8 to 64 times faster than sequential movement. As a complicated (21 GOPS) and typical communication system, the DVB-T base-band receiver is designed with low performance loss and mapped onto MorphoSys architecture (>28 GOPS). This solidly contributes to software defined radio development.