A 0.8 mu m advanced single poly BiCMOS technology for high density and high performance applications

A single poly, 0.8 mu m BiCMOS technology having both high-performance CMOS and 14 GHz ASPECT III n-p-n transistors is described. The advanced features of this BiCMOS technology include a low encroachment, defect-free recessed oxide isolation process, self-aligned integrated well taps for MOS devices, double diffused bipolar process, silicided local interconnect, and four levels of metallization with tungsten plugs. Ring oscillator gate delays of <150 ps BiCMOS, <90 ps CMOS, and<50 ps ECL are obtained with this process. This technology is most applicable to high-performance/high-density standard cell ECL gate array circuits requiring embedded memory.<
>