A complementary selective epitaxial growth (CSEG) process and its application to high speed bipolar transistors

A complementary selective epitaxial growth (CSEG) process has been developed. For a 1.4- mu m-thick epi film the epitaxial wells have relatively small corner facets (<0.3 mu m) compared to the commonly reported SEG wells, which have facets on the order of 0.6-0.7 mu m. This CSEG process was used in conjunction with low-energy base and emitter implantations and RTA processing to produce advanced complementary vertical high-speed transistors on the same silicon substrate. The peak f/sub t/ at V/sub bc/=3 V for the n-p-n was between 10 and 13 GHz, whereas it was between 3.5 and 5.4 GHz for the p-n-p. The peak gain was 80 for the n-p-n and 25 for the p-n-p. The breakdown (V/sub ceo/) was in excess of 9 V for both devices. The Early voltage for the p-n-p and n-p-n, respectively, was 8 and 20 V.<
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