A 40-MHz encoder-decoder chip generated by a Reed-Solomon code compiler

An eight-error correcting Reed-Solomon (RS) encoder-decoder chip is presented. The encoder and decoder can independently process 40 Mbytes of data per second. The design was generated by an RS code compiler. The chip, fabricated in a 1- mu m CMOS compacted-array technology with a 9.5-mm*9.5-mm die, has been tested and is fully functional. The RS code has symbol size 8 (1 byte/symbol). It has 16 bytes of redundancy and corrects 8 bytes of errors per codeword. The code length (between 54 and 255 bytes inclusive) is selectable by the user.<
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