High performance partially depleted SOI using spike RTA

Thinner Si body (700 /spl Aring/) SOI CMOS was successfully demonstrated with spike RTA on 0.13 /spl mu/m technology with 45 nm gate lengths and 16/spl Aring/ gate oxide. Spike RTA exhibited excellent short channel effect and lower miller capacitance (Cmiller), resulting in faster circuit speed and lower dynamic power compared to the conventional RTA. Spike RTA also showed comparable floating body effects and stress induced current degradation.