High-speed soft-error-immune ECL circuits with fully isolated transistors

The author describes the quality of bonded silicon-on-insulator (SOI) wafers and ECL circuit performance with completely isolated transistors. The bonded SOI wafers have no local unbounded areas, tight bonding strength exceeding 800 kg/cm/sup 2/, and a small deviation in the silicon layer on the buried oxide layer. A junction leakage current of less than 1 pA and an ideality factor of 1.03 show the crystalline quality of the bonded SOI wafer to be good. SOI transistor performance is the same as that of bulk-silicon transistors without substrate capacitance. The ECL circuit speed of a SOI wafer with a 1- mu m-thick buried oxide layer is at least 10% faster than that of a conventional wafer. SOI ECL circuit operation is speeded up at less than an optimized switching current. The SOI structure immunizes the ECL RAM with a p-n-p load cell against alpha particle induced soft errors. The soft error rate for the SOI ECL RAM with a Schottky clamped cell is 300 times lower than that for the bulk-silicon RAM.<
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