Analysis of gate currents through high-k dielectrics using a Monte Carlo device simulator [MOSFET applications]

The gate current through high-k dielectrics has been calculated by a Monte Carlo simulator. In high-k dielectrics, the gate current from the drain edge is dominant and is quite serious due to a lowering of the barrier height with an increasing dielectric constant. The stack structure of high-k dielectric and oxide films is effective to suppress gate current densities generated from high-energy carriers generated near the drain edge.