A low power, low datarate integrated 433 MHz wireless transceiver in CMOS

This paper describes the design of a low power all CMOS Wireless transceiver integrated circuit for use at 433 MHz. This device includes a number of unique features that provide additional flexibility, reduce power consumption, reduce system cost and improve system performance. The design was accomplished in AMI Semiconductors' standard 0.35 micrometer CMOS mixed signal process. The transceiver can operate at data rates from 1.2 Kb/sec to over 19.2 Kb/sec. The modulation used is On/Off Keying. Key features of the transceiver are integrated dual receiver chains that provide antenna diversity and a quick start capability, which can significantly reduce power consumption.