Development of a high-rate high-resolution detector for EXAFS experiments

A new detector for EXAFS experiments is being developed. It is based on a multi-element Si sensor and dedicated readout application specific integrated circuit (ASIC). The sensor is composed of 384 pixels, each having 1 mm/sup 2/ area, arranged in four quadrants of 12/spl times/8 elements and it is wire-bonded to 32-channel ASICs. Each channel implements low-noise preamplification with self-adaptive continuous reset, high-order shaper, bandgap referenced baseline stabilizer, one threshold comparator, and two digital-analog converter (DAC) adjustable window comparators, each followed by a 24-bit counter. Fabricated in 0.35 /spl mu/m CMOS, the ASIC dissipates about 8 mW per channel. First measurements show at room temperature a resolution of 14e/sup -/ rms without the detector and 40 e/sup -/ rms (340 eV) with the detector connected and biased. Cooling to -35 C a full width at half maximum (FWHM) of 205 eV (167 eV from electronics) was measured at the Mn-K/spl alpha/ line. A resolution of about 300eV was measured for rates approaching 100 kc/s per channel, corresponding to an overall rate in excess of 10 Mc/s/cm/sup 2/. Channel-to channel threshold dispersion after DAC adjustment 2.5 was e/sup -/ root mean square.