Absolute-value circuit using junction field-effect transistors

A novel configuration for an absolute-value circuit (full-wave rectifier with zero threshold) using two matched junction field-effect transistors is proposed and experimentally demonstrated. The zero-threshold rectification is accompanied by a scaling of the input signal by a theoretical factor of 1//spl radic/2, and is achieved by mathematically exploiting the nonlinear characteristics of the transistors. The circuit operates with complementary input signals and requires a dc bias voltage for the transistor gates. Negative or positive output voltages can be obtained by using either n- or p-channel devices.