Design implications of low-K

The aggressive technology migration of the last 10 years is presented. The circuit-level electrical characteristics of interest ( performance, power, area, noise ) that drive the definition of the back-end of line (BEOL) architecture features ( material, width, pitch, space ) are discussed. The paper finishes with a portrayal of the system, circuit, and technology options that may be needed in the 65 nm to 45 nm technology nodes to maintain scalability.