A new approach to test and diagnose the faulty logic blocks in FPGAs

The field programmable gate arrays (FPGAs) are widely used in the hardware implementation of many designed circuits. We introduce a new diagnosis procedure to detect the faulty nodes inside the FPGA and identify the faulty configurable logic blocks (CLBs) inside the faulty nodes. This procedure is based on Chwa-Hakimi model which provides the power to increase the capability of detection. A shifting technique is used to save the off-chip memory and to make the process of test and diagnosis is faster.