An approach to reduce common-mode voltage in matrix converter

In this paper, an approach to reduce common-mode voltage at the output of a matrix converter is discussed. A new modulation strategy which reduces the common-mode voltage at the output is presented. The proposed method maintains the active voltage vector and distributes zero vector equally within a sampling period and reduces square RMS of ripple components of input current. Advantages of the scheme include: 34% reduction in the common-mode voltage (peak value); improved harmonic spectrum; reduced switching losses and no more additional switching instants over one sampling period; and simplified implementation via software. Further, the voltage transfer ratio is unaffected by the proposed scheme. Simulation results are shown to demonstrate the advantages of the new pulsewidth modulation approach. Experimental results on a 230-V 3-kVA matrix converter-fed adjustable-speed drive based on a digital signal processor controller are presented.