A dual-band tri-mode CDMA IF receiver with programmable channel-match filter

An integrated dual-band tri-mode CDMA IF receiver with programmable channel-match filter is presented. The cascaded VGA and filter chain provides maximum voltage gain of 93 dB with noise figure of <7.5 dB. It also provides >88 dB of gain control range. The IF VCO, which operates at 2/spl times/LO for PCS mode and 4/spl times/LO for AMPS/CDMA mode, achieves -131 dBc/Hz of phase noise at 900 kHz offset with an external tank. An area-efficient combined channel-match filter chain for both CDMA/PCS and AMPS mode is realized by changing the clock frequency of a switched-capacitor filter and by switching-in and -out capacitors for the continuous time and switch-cap filters depending on the mode of operation. The filter chain meets all the blocker requirements for both CDMA/PCS and AMPS modes. Combining the CDMA/PCS and AMPS filter saves 30% die area compared to separate filter chains. The IC is fabricated in Jazz's 35 GHz ft silicon BiCMOS process and packaged into a 48-pin 6 mm/spl times/6 mm land grid array (RF-LGA/spl trade/) chipscale package.