An innovative open-loop CDR based on injection-locked oscillator for high-speed data link applications

A new fully integrated clock and data recovery (CDR) architecture based on an injection-locked oscillator is presented in this paper. Two circuits, implemented in CMOS VLSI technology and dedicated to 1 Gbps point-to-point networks, are detailed. This open-loop CDR topology is compared with classical ones (high-Q filter, phase-locking, ...) in term of power consumption, silicon area and complexity. Our circuits exhibit some major advantages versus traditional CDRs: no external component needed, low consumption and low locking time. It is a very simple way to achieve clock extraction and data regeneration for high-speed data link applications.