A design space exploration for integrated switching power converters

This work presents design space exploration of switching power converters focused on their monolithic implementation. An analysis in terms of the models of their main circuit elements (switching transistors, inductor and capacitor) is described. A merit figure is defined taking into account output voltage ripple, power efficiency and occupied die area. A singular point that maximizes performance is obtained, and particular simulation results for a 0.35 /spl mu/m standard CMOS technology are presented.