The influence of process and design of subcollectors on the ESD robustness of ESD structures and silicon germanium heterojunction bipolar transistors in a BiCMOS SiGe technology

This paper demonstrates the effect of process and design variations on the ESD robustness of both active and passive elements in 50, 120 and 200 GHz BiCMOS SiGe HBT processes. The influence of subcollector dopant type and concentration, and n-well on ESD robustness of SiGe HBT npn transistors, SiGe varactor structures, p/sup +//n-well/subcollector structures and n-well diode structures is shown. HBM and TLP ESD measurements are provided to evaluate the observation of lateral resistor ballasting in the subcollector region in these structures and its influence on ESD robustness.