Temperature-independence-point properties for 0.1 /spl mu/m-scale pocket-implant technologies and the impact on circuit design

The temperature-independence point (TIP) of the drain current for MOS transistors in a 0.1 /spl mu/m-scale pocket-implant technology is gate-length (L/sub g/) dependent and has different magnitudes for n-MOSFET and p-MOSFET. Circuits such as ring-oscillators have a TIP, lying between the values for nand pMOSFET. The circuit TIP Is close to the n-MOSFET TIP for long L/sub g/ and gets closer to the p-MOSFET TIP for short L/sub g/. The reason is the different temperature dependence of electron and hole mobility as a function of L/sub g/. Due to the high field effect, oscillation periods of ring-oscillators with short L/sub g/ hardly improve, when the supply voltage is raised beyond the TIP. Therefore, an advantageous supply-voltage (V/sub DD/) choice for pocket-implant technologies is near the TIP of circuits, allowing a favorable combination of short switching delay and minimized temperature dependence. By designing the V/sub th,p/ closer to V/sub th,n/, not only the low power dissipation, due to the reduction of the TIP, but also the suppressed TIP fluctuation can be realized.