Negative bias temperature instability of deep sub-micron p-MOSFETs under pulsed bias stress

Negative bias temperature instability (NBTI) and Positive bias temperature instability (PBTI) of p-MOSFETs with 2.4 nm thick oxide films were studied. The /spl Delta/Vth interface trap generation of p-MOSFET at DC and AC bias stresses with frequency up to 500 KHz were measured. Additional tests were also conducted under unipolar and bipolar bias stresses with varied stress on and off times. The /spl Delta/Vth and interface trap generation of p-MOSFET were observed to be significantly reduced for pulsed bias repetition frequencies greater than 10 KHz. However, /spl Delta/Vth of PBTI was almost independent of the bias stress frequency. These results suggested that there are different mechanisms for NBTI and PBTI phenomena, and the reliability specifications of NBTI could possibly be relaxed under certain pulsed operation conditions.