On the feasibility of cascaded single-stage distributed amplifier topology in digital CMOS technology

Feasibility of the cascaded single-stage distributed amplifier (CSDA) structure over the classical distributed amplifier for ultra broadband amplification in CMOS technology is investigated in this paper. A number of unique benefits gained from the CMOS CSDA are highlighted along with some important analysis and helpful design hints. Designed and simulated in standard digital 3.3V 0.35/spl mu/m CMOS process with realistic parasitic models, a prototype design of a 4-stage CMOS CSDA provides 21dB power gain at 5GHz bandwidth, more than -10dB input/output return loss, larger than -7.3dBm 3rd-order input intercept point (IIP3) and dissipates less than 132mW from a 2.2V power supply.