Delay-resistor implementation of integrators in biomimic artificial neurons

This paper presents an approach to leaky integrator implementation in biomimic artificial neurons. In this implementation, the delay inherent in MOSFET devices due to their parasitic capacitance is used in place of explicit capacitors to obtain a leaky integrator function. The resulting circuit realizes a nonlinear integrator with differing integration risetimes and falltimes. The MOSFET resistors are operated in the triode region. We discuss how such issues as gate bias levels and input/output signal swings affect the dynamic response of the integrator.