A static synchronous series compensator model for EMTDC

This paper presents a detailed simulation model of an SSSC for the simulation package EMTDC. The model includes a detailed representation of a three-level, 24-pulse voltage source inverter as well as the SSSC controls around it. The SSSC simulation model is first benchmarked against known results from the literature and then used to analyse the potential for an SSSC to cause network resonance.