A novel design of binary majority gate and its application to median filtering

A majority gate composed of output-wired inverters is proposed. A simple circuit for the majority gate constructed by conventional CMOS inverters is presented. The transistors are fewer and the delay time is constant, regardless of input numbers. A bit-level median filtering algorithm is presented as an application. The incorporation of the majority gate into the median filter is described. A flexible design for the median filter is presented.<
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