An overview of BiCMOS technology and applications

BiCMOS technology significantly enhances speed performance while incurring a negligible power or area penalty. BiCMOS can therefore provide applications with CMOS power and densities at speeds which were previously the exclusive domain of bipolar. This has been demonstrated in applications ranging from static RAMs to gate arrays to microprocessors. Thus, the concept of a system on a chip becomes a reality with BiCMOS. The main disadvantage of BiCMOS is greater process complexity, which results in a 1.1-1.3*packaged chip cost. BiCMOS is currently being demonstrated at 0.5 mu m. This will extend the conventional mod 5-V mod TTL (transistor-transistor logic) and ECL (emitter-coupled logic) interfaces to the next level of technology. The BiCMOS challenge has shifted from process and technology to circuits and systems.<
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