Comparative Analysis of Grain Boundary Effects in FET-Type and Diode-Type 3-D nand flash memory

Diode-type nand flash memory exhibits steep switching characteristics but is affected by grain boundary (GB) due to the polycrystalline silicon (poly-Si) channel. To determine the effects of these GBs, a single GB is placed under the cell where the positive feedback (PF) mechanism is triggered, and its positional influence on the turn-on voltage ( ${V}_{\text {on}}\text {)}$ under program (PGM) and erase (ERS) conditions is analyzed. In the PGM state, ${V}_{\text {on}}$ varies up to 650 mV depending on the GB location, while in the ERS state, it varies up to 300 mV. To reflect GB distributions, random Voronoi patterns are used, through which the multilevel cell (MLC) characteristics of diode-type and FET-type strings are compared. The mean and standard deviation ( $\sigma $ ) values of ${V}_{\text {on}}$ for the diode-type string are comparable to those of the FET-type string. As grain size (GS) increases, both structures show reduced subthreshold swing (SS), with the diode-type variant consistently exhibiting lower SS. For GS above 85 nm, the diode-type string also has lower $\sigma $ values of SS than the FET-type string. Depending on GS, the diode-type string maintains up to about $10^{{4}}$ times higher on/off ratio than the FET type string, enabling reliable data sensing during MLC operation. In addition, under temperature variations, the diode-type string exhibits comparable ${V}_{\text {on}}$ variation to the FET type string across different GSs, while maintaining lower SS and more stable on-current characteristics. These findings suggest that diode-type nand flash memory provides enhanced robustness and is a promising alternative for high-density applications such as triple-level cell (TLC) and quad-level cell (QLC).