A 10-300-MHz IF-digitizing IC with 90-105-dB dynamic range and 15-333-kHz bandwidth

An integrated low-noise amplifier, mixer, bandpass /spl Delta//spl Sigma/ analog-to-digital converter (ADC), decimation filter, and two synthesizers implement a general-purpose back-end for a narrow-band superheterodyne receiver. The /spl Delta//spl Sigma/ ADC is merged with the mixer and combines LC, active-RC, and switched-capacitor resonators to achieve low noise and robust operation with low power consumption. A variable full-scale feature adds an automatic-gain-control capability to the ADC while saving power and minimizing noise at low signal levels.