Design of parasitic-insensitive bilinear-transformed admittance-scaled (BITAS) SC ladder filters

A new method for the design of parasitic-insensitive switched-capacitor (SC) ladder filters is described. The filters are derived from analog
LC
prototypes utilizing the bilinear
z
-transform. The method is based on the signal-flowgraph (SFG) concept in the discrete-time domain. The resulting networks preserve the frequency response and low sensitivity properties of the equivalent continuous-time
LC
filters.