High-Current E-Mode InGaN/GaN p-FET on p-GaN Gate HEMT Platform

The low current density in E-mode GaN p-FET presents a severe challenge for its application in complementary logic (CL) circuits. In this work, a high-current E-mode InGaN/GaN p-FET is demonstrated on a p-GaN gate HEMT platform with p-InGaN/p-GaN/AlGaN/GaN heterostructure. The proposed heterostructure introduces a net polarization charge at the InGaN/GaN interface, leading to an enhanced 2DHG. With a negative gate bias, a buried 2DHG channel is formed prior to the surface MIS channel. As a result, the recess-gate InGaN/GaN p-FET with ${L}_{\text {G}} = 2~\mu $ m achieves a large maximum current ( ${I}_{\max }\text {)}$ exceeding −20 mA/mm. The InGaN/GaN p-FET obtains a low ${R}_{\text {ON}}$ of 0.64 k $\Omega \cdot $ mm and a high ${I}_{\text {ON}}$ / ${I}_{\text {OFF}}$ ratio exceeding $10^{{7}}$ . The device presents E-mode operation with a threshold voltage ( ${V}_{\text {TH}}\text {)}$ of −1.8 V and a low subthreshold swing (SS) of 144 mV/dec. Furthermore, an E-mode n-channel GaN HEMT is fabricated on the same platform, validating the potential of the proposed InGaN/GaN p-FET for GaN CL circuits.