Highly molecular systolic structures for denominator-separable 2-D recursive filters

Two systolic realization structures for the implementation of 2-D denominator-separable recursive filters are presented. These structures possess a high degree of modularity and parallelism with low roundoff noise. The number of delays and multipliers is fewer than for similar realizations in the literature. The proposed structures are more suitable for special-purpose hardware and amenable to VLSI design.<
>