Solid phase growth technique for high cut-off frequency polysilicon TFT integrated circuits on a quartz substrate

The technique features the use of self-implantation at two energy steps, i.e. 150 and 40 keV. The complete amorphization of the initial low-pressure chemical vapor deposition (LPCVD) polysilicon is thereby attained throughout the film. Application of the solid-phase growth technique resulted in excellent high-frequency performance of the thin-film transistors (TFTs) over a large area with high reproducibility. The field effect mobilities obtained for n-channel and p-channel TFTs are as high as 148 and 68 cm/sup 2//V-s, respectively. TFT shift registers consisting of 223 stages of CMOS D-type flip-flops can successfully operate at clock frequencies up to 25 MHz under a supply voltage of 15.5 V on a fused-quartz substrate.<
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