A design methodology for the I/O power supply of next generation packaging

The method of three-dimensional I/O power modeling is reviewed in detail based on the learning from the previous one-dimensional and two-dimensional models. This paper covers the latest development of next generation microprocessor I/O power models and the adoption of a new three-dimensional modeling methodology to meet the challenging design requirements of a high performance signal bus with short turn-around times. The paper also presents a new technique of using damping resistors to attenuate the high frequency noise on the I/O supply.