DC-coupled low-power digit detector

A monolithic integrated digit detector for a plated-wire memory system is described. It consists of a two-stage differential amplifier, a narrow-strobe gate, a preset gate, and a register (a set-reset flip-flop) that stores the detected signal during the time between the narrow-strobe pulse and the preset pulse. The device features high sensitivity of 1.3 mV and low-power dissipation of 100 mW. This high-sensitivity low-power digit detector is suitable for low-cost integration.