Stacked I/sup 2/L structures

In LSI environments where the available power supply is greater than 800 mV, integrated injection-logic's (I/SUP 2/L's) inherent high level of power efficiency is restored by stacking. The use of stacked I/SUP 2/L structures in the realization of random logic and regular arrays is studied. Two approaches are considered and compared. Design examples are given including adders, a seven segment display decoder, and a control logic function. The degradation of the speed of operation because of the stacking is analyzed and experimentally verified.