Techniques for reducing the peak power of a switching transistor with p-i-n diode load

Describes techniques for reducing the peak power of switching transistor that reverse biases a p-i-n diode load. Particular emphasis is placed on a parallel combination of a Zener diode and an inductor and it is shown that, for an experimental p-i-n driver, the peak power is reduced from 252 to 90 W.