Some considerations on high-speed injection logic

After a brief review of the factors that limit the switching speed of standard I/SUP 2/L, the propagation delay time of some special high-speed I/SUP 2/L gates is computed. For a gate realized in oxide-isolated, shallow epitaxial layers, the delay time is directly dependent on the injector base width. Generally, the n-p-n switching transistor hardly contributes to the time delay. For a modified I/SUP 2/L gate in which saturation of the injector is avoided, the delay time is mainly determined by the unity gain frequency of the switching transistor. However, due to the heavy saturation of this transistor, values of /spl tau//SUB d/ already realized indicate that the speed improvement is less than an order of magnitude.